1. Field of the Invention
The disclosed embodiments of the present invention relate to a snubber circuit, and more particularly, to a snubber circuit which has long recovery time even when operating in a fast switching mode, and a related buffering method for a snubber circuit.
2. Description of the Prior Art
FIG. 1 illustrates a DC-to-DC converter (flyback converter) 100 of a conventional switching power supply, wherein when a switch Q1 (i.e. a switching transistor) is turned off, leakage inductance of a transformer TX1 induces a voltage spike across two terminals of the switch Q1. The DC-to-DC converter 100 uses an RCD snubber 102 including a plurality of resistors RX and R1, a capacitor C1 and a diode D1 to reduce a primary-side ring current Id generated due to instantaneous switching, wherein the resistor R1 may be omitted. The RCD snubber 102 charges the capacitor C1 by conducting the primary-side ring current Id through the diode D1. As a reverse recovery time of the diode D1 is too short, the capacitor C1 cannot be fully discharged through the diode D1. Hence, a bleeder resistor (i.e. the resistor RX) is coupled in parallel with the capacitor C1 to consume the primary-side ring current Id, thus allowing a voltage across the two terminals of the switch Q1 to return to a normal level. However, the aforementioned bleeder resistor increases power losses and decreases power conversion efficiency of the switching power supply.
Thus, a novel snubber circuit is needed to reduce/eliminate unnecessary power losses in high speed switching circuits.